Difference between pages "Diabetes products and services" and "Transactional memory in hardware"

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−	{{TOCrightEx}}	+	==Background==
		+	===Transactional memory===
		+	*Transactional memory is a general and flexible way to allow programs to read and modify disparate primary memory locations atomically as a single operation, much as a database transaction can atomically modify many records on disk.
		+	*[http://en.wikipedia.org/wiki/Transactional_memory Transactional memory] attempts to simplify parallel programming by allowing a group of load and store instructions to execute in an atomic way. Transactional memory is a concurrency control mechanism analogous to database transactions for controlling access to shared memory in concurrent computing. A transaction is a piece of code that executes a series of reads and writes to shared memory.
		+	*Transactional memory (TM) supports code sections that are executed atomically, i.e., so that they appear to be executed one at a time, with no interleaving between their steps. TM significantly reduces the difficulty of writing correct concurrent programs. A good TM implementation avoids synchronization between concurrently executed transactional sections unless they actually conflict. TM can significantly improve the performance and scalability of concurrent programs, as well as makes them easier to write, understand and maintain.
		+	*[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220070156994%22.PGNR.&OS=DN/20070156994&RS=DN/20070156994 Transactional memory] generally refers to a synchronization model that allows multiple threads to concurrently access a shared resource (such as a data structure stored in memory) without acquiring a lock as long as the accesses are non-conflicting, for example, as long as the accesses are directed to different portions of the shared resource.
		+	'''[[More details]]'''
		+	----
−	==[[Diabetes Overview]]==	+	===Transactional programming models===
		+	*[http://research.sun.com/spotlight/2007/2007-08-13_transactional_memory.html Transactional programming models] can be supported in software using software-based transactional memory (STM), in hardware using hardware- based transactional memory (HTM), or in a combination of the two (Hybrid TM, or HyTM).
		+	**[http://en.wikipedia.org/wiki/Software_transactional_memory Software based Transactional memory] (STM) can allow sequences of concurrent operations to be combined into atomic transactions, thereby reducing the complexity of both programming and verification. STM is a scheme for concurrent programming with multiple threads that uses transactions similar to those used in databases.
		+	**Hardware based Transactional memory (HTM) system requires no read or write barriers within the transaction code. The hardware manages data versions and tracks conflicts transparently.
		+	**[http://www.eecs.harvard.edu/~fedorova/papers/asplos165-damron.pdf Hybrid Transactional memory] (HyTM) implements Transactional memory in software so that it can use best-effort Hardware Transactional memory (HTM) to boost performance but does not depend on HTM.
−	=== News stories ===
−	* [http://health.msn.com/dietfitness/articlepage.aspx?cp-documentid=100144067 One of the top stories on Reddit - Dec 26, 2006]
−	* [http://www.nytimes.com/2006/12/26/health/26workplace.html?hp&ex=1167195600&en=79c108081b2bd0e3&ei=5094&partner=homepage Home page story on New York Times - Dec 26, 2006]
−	* "Today nearly one out of every 10 adults in the US has diabetes. Among people over 60, that figure is even higher - one in five. But what's most alarming is that many people don't know they have diabetes until they develop one of its terrible complications - like heart disease, blindness or stroke.": University of California, San Francisco Diabetes Center
−	===Total Prevalence of Diabetes & Pre-diabetes (US)===	+	===Software based Transactional memory===
−	* '''Total''': 20.8 million children and adults -- 7.0% of the population -- have diabetes.	+	*Software transactional memory (STM) is implemented in software. All speculative STM transactional data is stored in the system memory and indicated to be in a non-committed state. When the STM transaction commits, any data the transaction writes is indicated as committed and subsequently available to other threads and transactions. In certain STM systems, a flag may be set to indicate the data as committed and accessible and available in memory to other transactions.
−	* '''Diagnosed''': 14.6 million people	+
−	* '''Undiagnosed''': 6.2 million people	+
−	* '''Pre-diabetes''': 54 million people	+
−	* 1.5 million new cases of diabetes were diagnosed in people aged 20 years or older in 2005. ([http://www.diabetes.org/diabetes-statistics/prevalence.jsp Source])	+
−	===Calories and food consumption - US===	+	====DracoSTM====
−	<table>	+	*[http://eces.colorado.edu/~gottschl/dracoSTM/pubs/lcsd07-dracostm.pdf DracoSTM] is a high performance lock-based C++ Software Transactional memory research library. DracoSTM uses only native object-oriented language semantics, increasing its intuitiveness for developers while maintaining high programmability via automatic handling of composition, locks and transaction termination.
−	<tr>	+	*DracoSTM is a lock-based STM system. At its core, DracoSTM uses one lock per thread to implement transactional reads and writes. This allows multiple transactions to simultaneously read and write without blocking other transactions’ progress.
−	<td>[[image:calories consumption.jpeg|thumb|center|380 px]]	+
−	</td>	+
−	<td>	+
−	</td>	+
−	</tr>	+
−	<tr>	+
−	<td>[[image:food consumption.jpeg|thumb|center|400 px]]	+
−	</td>	+
−	<td>	+
−	</td>	+
−	</tr>	+
−	<tr>	+
−	<td>[[image:Milk.jpeg|thumb|center|380 px]]	+
−	</td>	+
−	<td>[[image:Fat consumption.jpeg|thumb|center|400 px]]	+
−	</td>	+
−	</tr>	+
−	<tr>	+
−	<td>[[image:Vegetables.jpeg|thumb|center|380 px]]	+
−	</td>	+
−	<td>[[image:Fruits.jpeg|thumb|center|400 px]]	+
−	</td>	+
−	</tr>	+
−	<tr>	+
−	<td>[[image:Meat products.jpeg|thumb|center|380 px]]	+
−	</td>	+
−	<td>[[image:Sweetener consumption.jpeg|thumb|center|400 px]]	+
−	</td>	+
−	</tr>	+
−	</table>	+
−	* Drinking Coffee Helps Lower the Chance of Getting of Type 2 Diabetes [http://www.diabetes.org/diabetes-research/summaries/Smith-drinking-coffee-lowers-risk.jsp Source]
−	* Coffee and Green Tea May Help Prevent Type 2 Diabetes [http://www.diabetes.org/diabetes-research/summaries/iso-coffee-green-tea.jsp Source]
−	===Maintaining a healthy weight is a challenge for most Americans===	+	====Dynamic STM (DSTM)====
−	*66.3% of the adult population in the US weigh more than is healthy Where you carry your fat is important. Fat in the mid-section – visceral fat – is worse, as this fat surrounds and invades vital organs. Few Americans add muscle and bone after their early twenties so nearly all added weight is fat	+	*[http://research.sun.com/scalable/pubs/PODC03.pdf Dynamic Software Transactional Memory (DSTM)] is a low-level application programming interface (API) for syn-chronizing shared data without using locks.
−	* Daily caloric intake is the number of calories needed per day to maintain your current weight. Maintaining a healthy weight is a balancing act of calories consumed versus calories burned	+	*DSTM supports dynamic-sized data structures. DSTM has non-blocking implementation. The non-blocking property is obstruction-freedom. Dynamic means that the set of locations accessed by the transaction is not known in advance and is determined during its execution.
−	Weight change = calories in – calories out	+	*DSTM techniques allow transactions and transactional objects to be created dynamically.Transactions may determine the sequence of objects to access based on the values observed in objects accessed earlier in the same transaction. DSTM is well suited to the implementation of dynamic-sized data structures such as lists and trees.
−	* Small increases in daily caloric intake cause increases in body fat mass (Figure 1)	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_01.png|Figure 1. Cumulative effect of small daily imbalances in energy intake on body fat mass]]	+
−	* From 1971-2000 there was a statistically significant increase in average caloric intake—2,450 kcals to 2,618 kcals in men (''P ''<nowiki><</nowiki> 0.01) and 1,541 kcals to 1,877 kcals in women (''P ''<nowiki><</nowiki> 0.01) (Figure 2)	+	====Dynamic Software Transactional Memory 2.0 (DSTM2)====
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_02.png|Figure 2. Caloric intake from 1971-2000]]	+	*[http://research.sun.com/scalable/pubs/OOPSLA2006.pdf DSTM2] is a Java-based software library that provides a flexible framework for implementing STM. DSTM2 significantly improves the programming interface of its predecessor DSTM. The code is provided in Java libraries and any Java programmer can use it easily. DSTM2 allows researchers to plug in their STM implementations and directly compare them with others.
		+	*The DSTM2 library assumes that multiple concurrent threads share data objects. The DSTM2 library provides a new kind of thread that can execute transactions, which access shared atomic objects. DSTM2 threads provide methods for creating new atomic classes and executing transactions.
−	* Today, adult men and adult women are almost 25 pounds heavier than 40 years ago (Figure 2). Children aged 6-11 are almost 9 pounds heavier. Teen boys and girls are 15 and 12 pounds heavier respectively, topping the scales in 2002 at 141 pounds and 130 pounds	+	====Nonblocking Software Transactional Memory====
−	* Obesity ranks low on the list of serious health problems. Only 9% of respondents to a national survey indicated their own weight was a problem, despite more than 50% were overweight	+	*[http://research.sun.com/scalable/pubs/PPoPP2008-NBSTM.pdf Nonblocking STMs] are obstruction free. Nonblocking Software Transactional Memory guarantees that, if a transaction is repeatedly retried and eventually encounters no interference from other transactions, then eventually the transaction commits successfully.
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_03.png|Figure 3. Mean weight for men and women over the last 40 years]]	+	*Nonblocking STM “steals” ownership of a memory location from another transaction, rather than waiting for the other transaction to explicitly release it. Accessing stolen locations is more complicated and expensive than accessing unstolen ones, but stealing is worthwhile in order to avoid waiting for another transaction that is delayed for a long time.
−	* As the average daily caloric intake has increased, the percentage of caloric intake from fat decreased, and the percentage from carbohydrates increased significantly for both men and women (Figures 4 and 5)	+	====<span style="color:#C41E3A">Like this report?</span>====
−		+	<p align="center"> '''This is only a sample report with brief analysis''' <br>
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_04.png|Figure 4. Percentage of caloric intake from fat from 1971-2000]]	+	'''Dolcera can provide a comprehensive report customized to your needs'''</p>
−		+	{|border="2" cellspacing="0" cellpadding="4" align="center" "
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_05.png|Figure 5. Percentage of caloric intake from carbohydrates from 1971-2000]]	+	|style="background:lightgrey" align = "center" colspan = "3"|'''[mailto:info@dolcera.com <span style="color:#0047AB">Buy the customized report from Dolcera</span>]'''
−		+
−	'''Dietary habits can help pile on the pounds'''	+
−		+
−	* Consumption of food away from home, increased consumption of salty snacks, soft drinks and pizza, and increased portion sizes have contributed to increased caloric intake	+
−	* Over the last 20 years portions have grown significantly	+
−	** With the exception of white bread, the sizes of marketplace portions exceed federal standards by at least a factor of 2 and sometime 8<sup><nowiki>[</nowiki></sup>	+
−	o Items in fast food restaurants are 2 to 5 times larger than 2 decades ago due to the increased variety of available portion sizes	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_06.png|Figure 6. Increase in portion size from 1977-1996]]	+
−	* The increases in portion size are significant and result in more calories consumed. An added 10 kcal/day of unexpended energy is equivalent to an extra pound of weight per year (Figure 6)	+
−		+
−	'''Americans need to pay more attention to what we eat and our activity levels'''	+
−	* Recent guidelines from the American Heart Association focus on both a healthy diet and healthy lifestyle to reduce the risk of developing cardiovascular disease	+
−	* Recommended calorie intake will differ for individuals based on age, gender, and activity level, as seen in the Dietary Guidelines for Americans 2005, available at: [http://www.healthierus.gov/dietaryguidelines www.healthierus.gov/dietaryguidelines].	+
−	* Lifestyle activity levels are directly tied to calorie consumption in the body. Lifestyle activity levels have been defined as:	+
−	** Sedentary means a lifestyle that includes only the light physical activity associated with typical day-to-day life	+
−	** Moderately active means a lifestyle that includes physical activity (consuming 3.5 to 7 calories/min) equivalent to walking about 1.5 to 3 miles per day at 3 to 4 miles per hour, in addition to the light physical activity associated with typical day-to-day life	+
−	** Active means a lifestyle that includes physical activity (consuming <nowiki>></nowiki> 7 calories/minute) equivalent to walking more than 3 miles per day at 3 to 4 miles per hour, in addition to the light physical activity associated with typical day-to-day life	+
−		+
−	* The recent Dietary Reference Intakes publication recommends	+
−	** Fat intake:	+
−	*** 30% to 40% kcal in children 1 to 3 years	+
−	*** 25% to 35% kcal in children 4 to 18 years	+
−	*** 20% to 35% kcal in adults	+
−	** Protein intake:	+
−	*** 5% to 20% kcal in children 1 to 3 years old	+
−	*** 10% to 30% kcal in children 4 to 18 years old	+
−	*** 10% to 35% kcal in adults	+
−	** Carbohydrate intake:	+
−	*** 45% to 65% kcal in all children and adults	+
−		+
−	'''Diet and exercise can make a difference in your overall health'''	+
−	* Weight reduction requires a careful balance of fat, protein and carbohydrate intake (Figure 7)	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_07.png|Figure 7. Nutrient content of a weight-reducing diet]]	+
−	* The Nurse<nowiki>’</nowiki>s Health Study and the Health Professionals Follow-up Study demonstrated that middle-aged women and men who gained 11-22 pounds after age 20 were up to 3 times more likely to develop heart disease, high blood pressure, type 2 diabetes, and gallstones than those who gained 5 pounds or fewer	+
−	* Weight loss of 5% to 15% of total body weight can lower an individual<nowiki>’</nowiki>s chance of heart disease or having a stroke, as weight loss may improve blood pressure, triglycerides, cholesterol levels, decrease inflammation throughout the body, and improve mental health and quality of life. Moderate intentional weight loss sustained over time may be associated with reduced mortality	+
−	* Only 8% of American adults are aware of the link between overweight and cancer.<br>Overweight leads to insulin resistance and may be linked to breast cancer, aggressive prostate cancer, colorectal cancer and endometrial, kidney, pancreatic and esophagus cancer as well as lymphomas	+
−	* Higher levels of physical activity promote long-term weight loss better than conventional recommendations for low to moderate activity (Figure 8)	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_08.png|Figure 8. Effect of physical activity on body weight]]	+
−	* People who exercise regularly achieve better maintenance of weight loss and have beneficial effects on their cardiovascular, physical and psychological well-being	+
−	* Compared to a low-fat diet or conventional weight loss diet, a low-carbohydrate diet program had better participant retention and greater weight loss—there were beneficial effects on serum triglyceride levels and high density lipoprotein as well as improved glycemic control	+
−	* Diet and exercise may prevent or delay the onset of diabetes	+
−	** Modest weight loss and changes in lifestyle reduced the 3-year incidence of type 2 diabetes by 58%	+
−	** Weight loss strategies using dietary, physical activity or behavioral interventions produced significant improvements in weight among person with pre-diabetes, and a significant decrease in diabetes incidence	+
−	* Dietary guidelines encourage eating fewer calories, being more active and making wise food choices. Making wise food choices involves a careful look at nutrition labels and calories consumed. Carbohydrates and protein each contain 4 calories/gram while alcohol and fat contain 7 calories and 9 calories per gram, respectively. Don<nowiki>’</nowiki>t waste the daily allotment with empty calories – calories do count	+
−		+
−	===The Universe for Reducing Calories is Expanding===	+
−	'''Prevalence of overweight and obese adults is increasing'''	+
−	* Obesity among all ages, races, educational levels, and smoking levels is increasing	+
−	* Between 1991 and 2001 prevalence of obesity increased by 74% – 21.4 million obese men and 22.9 million obese women	+
−	* During this same time period the percentage of overweight adults increased from 45% to 58%	+
−	* In 2004, obese adults represented ≥ 25% of the adult population in 9 of the 50 states (Figure 1)	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_09.png|Figure 1. Prevalence of obesity among US adults, 1991, 1996 and 2004.]]	+
−		+
−	* In 2003, more than 136,000,000 American adults were overweight, and this number continues to grow	+
−	* Recent evidence suggests that increases in body weight in women may be leveling off, though no specific reason for the trend was given	+
−		+
−	'''Prevalence of overweight among children has tripled'''	+
−	* Figure 2 shows the change in percent of overweight children, 6-12 and 12-19 years of age, from data analyzed in the mid 1960s and at the turn of the century	+
−	* In 2003-2004, '''''17.1% of children and adolescents 2-19 years of age (over 12.5 million) were overweight'''''	+
−	* Prevalence of overweight among girls increased from 13.8% in 1999 to 16.0% in 2004	+
−	* Prevalence of overweight among boys increased from 14.0% to 18.2% during the same time frame	+
−	* Overweight is associated with a number of comorbidities in children	+
−	* Metabolic, orthopedic, cardiovascular, psychological, neurological, hepatic, pulmonary and renal comorbid conditions can exist	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_10.png|Figure 2. Prevalence of pediatric obesity]]	+
−		+
−	'''Body mass index (BMI), calculated with height and weight, is used to define overweight and obesity'''	+
−		+
−	* The NHLBI defines underweight, normal weight, overweight and 3 classes of obesity based on BMI (Table 1)	+
−	* BMI = kg/m<sup>2</sup> <nowiki>{</nowiki>BMI = weight (pounds) x 703 ÷ height squared (inches)<nowiki>}</nowiki>	+
−	* BMI and waist circumference correlate with the amount of body fat; both are surrogate markers of body fat	+
−		+
−	'''Table 1. Defining overweight and obesity.'''	+
−		+
−	{|border="2" cellspacing="0" cellpadding="4" width="50%"	+
−	|align = "center"|'''Classifications of BMI'''	+
−	|align = "center"|'''BMI'''	+
−	|-	+
−	|align = "center"|Underweight	+
−	|align = "center"|<nowiki><</nowiki> 18.5 kg/m<sup>2</sup>	+
−	|-	+
−	|align = "center"|Normal weight	+
−	|align = "center"|18.5-24.5 kg/m<sup>2</sup>	+
−	|-	+
−	|align = "center"|Overweight	+
−	|align = "center"|25-29.9 kg/m<sup>2</sup>	+
	|-		|-
−	|align = "center"|Obesity (Class 1)	+	| align = "center"| [http://www.dolcera.com/website_prod/services/ip-patent-analytics-services Patent Analytics Services]
−	|align = "center"|30-30.4 kg/m<sup>2</sup>	+	|align = "center"| [http://www.dolcera.com/website_prod/services/business-research-services Market Research Services]
		+	|align = "center"| [http://www.dolcera.com/website_prod/tools/patent-dashboard Purchase Patent Dashboard]
	|-		|-
−	|align = "center"|Obesity (Class 2)	+	|align = "center"| [http://www.dolcera.com/website_prod/services/ip-patent-analytics-services/patent-search/patent-landscapes Patent Landscape Services]
−	|align = "center"|35-39.9 kg/m<sup>2</sup>	+	|align = "center"| [http://www.dolcera.com/website_prod/research-processes Dolcera Processes]
		+	|align = "center"| [http://www.dolcera.com/website_prod/industries Industry Focus]
	|-		|-
−	|align = "center"|Extreme obesity (Class 3)	+	|align = "center"| [http://www.dolcera.com/website_prod/services/ip-patent-analytics-services/patent-search/patent-landscapes Patent Search Services]
−	|align = "center"|<nowiki>></nowiki> 40 kg/m<sup>2</sup>	+	|align = "center"| [http://www.dolcera.com/website_prod/services/ip-patent-analytics-services/alerts-and-updates Patent Alerting Services]
		+	|align = "center"| [http://www.dolcera.com/website_prod/tools Dolcera Tools]
	|-		|-
	|}		|}
		+	<br>
		+	====[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=3&f=G&l=50&co1=AND&d=PTXT&s1=transactional.TI.&s2=memory.TI.&OS=TTL/transactional+AND+TTL/memory&RS=TTL/transactional+AND+TTL/memory Non-blocking conditions]====
		+	=====Lock-free transactional memory=====
		+	*'''Lock-free transactional memory:''' A transactional memory implementation is lock-free if all its operations are lock-free and if some thread repeatedly attempts to commit transactions, then eventually some thread performs a successful commit.
		+	*'''Lock-freedom:''' An implementation of an operation is lock-free if after a finite number of steps of any execution of that operation, some operation execution completes (irrespective of the timing behavior of any concurrent operation executions).
−	'''Obesity and weight gain are associated with an increased risk of diabetes'''	+	=====Wait-free transactional memory=====
−	* Prevalence of obesity from 1991 to 2001 correlates with the increased prevalence of diabetes<sup> </sup>(Figure 4)	+	*'''Wait-free transactional memory:''' A transactional memory implementation is wait-free if all its operations are wait-free and any thread that repeatedly attempts to commit transactions eventually performs a successful commit.
−	* Between 1990 and 2001 the prevalence of diabetes increased 61%	+	*'''Wait-freedom''': An implementation of an operation is wait-free if after a finite number of steps of any execution of that operation, that operation execution completes (irrespective of the timing behavior of any concurrent operation executions).
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_12.png|Figure 4. Prevalence of obesity and diabetes among US adults, 1991 and 2001.]]	+
−	* In 2003, 14,100,000 Americans had been diagnosed with diabetes	+	=====Obstruction-free transactional memory=====
−	* More than 80% of type 2 diabetes patients are either overweight or obese	+	*'''Obstruction-free transactional memory:''' A transactional memory implementation is obstruction-free if all its operations are obstruction-free and if some thread repeatedly attempts to commit transactions, and runs in isolation after some point, then it eventually performs a successful commit.
−	* Diabetic women are at increased risk of major cardiovascular disease and represent the only group where cardiovascular mortality is increasing	+	*'''Obstruction-freedom:''' An implementation of an operation is obstruction-free if every operation execution that executes in isolation after some point completes after a finite number of steps.
−	'''There is a progression from normal blood sugar to type 2 diabetes'''	+	===Hardware based Transactional memory===
		+	*HTM comprises hardware transactions implemented entirely in processor hardware. For hardware transactions, data may be stored in hardware registers and cache, such that all cache actions are done atomically in hardware and data in the HTM is only written to the main memory upon committing the transaction. The HTM holds all the speculative writes without propagating to the main system memory, such as a Random Access Memory (RAM) device, until the transaction commits. If the hardware transaction aborts, then the cache lines holding the tentative writes in the HTM are discarded. HTM hardware transactions may utilize cache coherency protocols to detect and manage conflicts between HTM hardware transactions. The cache coherency protocols keep track of accesses within a hardware transaction. If two hardware transactions are accessing a same memory location, then the HTM aborts one transaction if there is a conflict, else the transaction's changes may be committed to the system memory.
		+	*HTM transactions usually require less overhead then STM transactions because HTM transactions occur entirely in hardware. HTM transactions may be limited to smaller transactions due to hardware limitations, whereas STM transactions can handle large and longer transactions. [http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220070143287%22.PGNR.&OS=DN/20070143287&RS=DN/20070143287 Source]
		+	*The multi-core processor '''Rock''' supports [http://research.sun.com/scalable/pubs/TRANSACT2008-ATMTP-Apps.pdf Hardware Transactional Memory] (HTM).
		+	*'''Rock'''’s HTM feature is an important but modest first step in integrating HTM support into a mainstream commercial multi-core processor.
		+	*'''Rock''' supports HTM with two new instructions, chkpt and commit, and a new checkpoint status (cps) register. A transaction is started by a chkpt instruction, and is terminated by either a commit instruction or the failure of the transaction. If a transaction fails, some indication of the cause of failure is stored in the cps register, and control is transferred to the PC-relative offset (fail pc) specified by the chkpt instruction.
−	* Prediabetes is a new term for a condition found in adults before they are diagnosed with diabetes	+	====Adaptive Transactional Memory Test Platform====
−	* Prediabetes is characterized by higher than normal blood glucose levels, either impaired fasting glucose or impaired glucose tolerance not yet high enough to be classified as diabetes	+	*The [http://www.cs.wisc.edu/gems/doc/gems-wiki/moin.cgi/ATMTP Adaptive Transactional Memory Test Platform] (ATMTP) provides a first-order approximation of the success and failure characteristics of transactions on '''Rock'''. ATMTP will allow developers to test and tune their code for '''Rock'''.
−	* Almost all diabetic patients go through a phase called impaired glucose tolerance (IGT) or impaired fasting glucose (IFG) (Figure 5)	+	*ATMTP correctly models '''Rock'''’s HTM-related instructions, and fairly accurately reflects most of the circumstances that cause '''Rock''' transactions to fail. ATMTP provides a good platform for experimenting with HTM-based code that will behave similarly on '''Rock'''.
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_13.png|Figure 5. Progression to diabetes]]	+
−	* Based on projected NHANES III data, the number of prediabetic individuals was almost 12 million in 2000 among overweight individuals (Figure 6)	+
−	*• Patients with prediabetes have the potential to develop diabetes within a decade if no modifications to their diet and level of physical activity are made	+
−	* Over 50 million adults ages 40-74 have prediabetes, of which 1 in 4 will develop type 2 diabetes	+
−	[[Image:Maintaining_a_healthy_weight_is_a_challenge_for_most_Americans_14.png|Figure 6. Proportion of overweight adults with IFG only, IFG and IGT, and IGT only]]	+
−	* Prevalence of cardiovascular disease risk factors is high among patients with prediabetes:	+	====Unbounded Hardware Transactional Memory (UHTM)====
−	** 94.9% had dyslipidemia	+	*[http://supertech.csail.mit.edu/papers/xaction.pdf UHTM] is commited in-cache. When not possible, hardware “spills” transaction information into memory, allowing (essentially) unbounded transactions. UTM is more appealing for programmer, but is significantly more complicated. Unbounded means that there is no limit on the number of locations accessed by the transaction.
−	** 56.5% had hypertension	+
−	** 13.9% had microalbuminuria	+
−	** 16.6% were current smokers	+
−	* Prediabetes increases a person<nowiki>’</nowiki>s risk for an MI or stroke by 50%	+
		+	====Best-effort Hardware Transactional Memory====
		+	*Best-effort Hardware Transactional Memory transactions are committed in-cache and aborted if they don’t fit. Best-effort Hardware Transactional Memory has simple design.Best-effort Hardware Transactional Memory violates Principle of Least Astonishment. Programmer should not have to think about cache mapping, cache size, cache organization, etc.
		+	*[http://research.sun.com/scalable/pubs/TRANSACT2008-ATMTP-Apps.pdf Best-effort HTM] does not guarantee to support transactions of any size and duration, and thus is free to simply abort transactions that exceed on-chip resources for HTM or encounter difficult events or situations.
−	'''Obesity and diabetes can be prevented'''	+	====Split Hardware Transaction (SpHT)====
		+	*The [http://research.sun.com/scalable/pubs/PPoPP2008-SpHT.pdf Split Hardware Transaction (SpHT])uses minimal software support to combine multiple segments of an atomic block, each executed using a separate hardware transaction, into one atomic operation. The idea of segmenting transactions can be used for many purposes, including nesting, local retry, or Else, and user-level thread scheduling. SpHT overcomes the limited expressive power of best-effort HTM while imposing overheads dramatically lower than STM and preserving useful guarantees such as strong atomicity provided by the underlying HTM.
−	* The 1979 Surgeon General<nowiki>’</nowiki>s Report, ''Healthy People'', laid the foundation for a national prevention agenda to ensure that good health, as well as long life, are enjoyed by all	+	====Virtualized Transactional Memory (VTM)====
−	* The Healthy People 2010 objective is to reduce the prevalence of '''''obesity among adults to <nowiki><</nowiki> 15%, and to have <nowiki>></nowiki> 60% of the adult population in the normal weight range'''''	+	*[http://www.cs.wisc.edu/trans-memory/misc-papers/moir:hybrid-tm:tr:2005.pdf Virtualized TM (VTM)] maintains atomicity and isolation even if a transaction is interrupted by a cache overflow or a system event. VTM maps the key bookkeeping data structures for transactional execution (read set, write set, write buffer or undo-log) to virtual memory, which is effectively unbounded and is unaffected by system interruptions. The hardware caches hold the working set of these data structures. VTM also suggested the use of hardware signatures to avoid redundant searches through structures in virtual memory.
−	* Another Healthy People 2010 objective is to reduce the number of '''''overweight or obese children and adolescents aged 6-19 years to 5%'''''	+
−	* The American Diabetes Association recommends that all overweight people 45 years of age or older with impaired glucose tolerance or impaired fasting glucose should be classified as having prediabetes and that they are potential candidates for diabetes prevention interventions	+
−	* The Diabetes Prevention Program (DPP) showed that diet and exercise resulting in a 5 to 7 percent weight loss lowered the incidence of type 2 diabetes by 58%	+
−	**Participants lost weight by cutting fat and calories in their diet and by exercising at least 30 minutes per day, 5 days per week	+
−	== The Essential Elements of Diet Menus for Diabetes==	+
−	Diet menus for diabetes need to be	+
−	* Low	+
−	** in fats, particularly saturated or animal fats	+
−	**in white, refined flour	+
−	**in cholesterol	+
−	**in calories, since obesity dramatically increases the risk of heart disease	+
−	**in simple or refined sugars	+
−	**in sodium, particularly if elevated blood pressure has already been identified	+
−	* High	+	====[http://research.microsoft.com/~larus/Papers/p80-larus.pdf Conflict detection]====
−	**in complex carbohydrates, particularly those containing raw fiber.  For example: brown bread, brown rice	+	*HTM systems rely on a computer’s cache hierarchy and the cache coherence protocol to implement conflict detection. Caches observe all reads and writes issued by a processor, can buffer a significant amount of data, and can be searched efficiently because of their associative organization. All HTMs modify the first-level caches, but the approach extends to higher-level caches, both private and shared.
−	**in fresh fruits and vegetables	+	*Conflict detection occurs as other processors receive the coherence messages from the committing transaction. Hardware looks up the received block address in the local caches. If the block is in a cache and has its R or W bit set, there is a read-write or a  write-write conflict between the committing and the local transaction. The hardware signals a software handler, which aborts the local transaction and potentially retries it after a backoff period.
−	[http://weightlossinternational.com/newsletter/diet-menus-for-diabetes.html Source]	+	*'''Direct memory updates:''' For direct updates, the hardware transparently logs the original value in a memory block before its first modification by a transaction. If the transaction aborts, the log is used to undo any memory updates.
		+	*'''Early conflict detection :''' For early conflict detection, the hardware acquires exclusive access to the cache block on the first write and maintains it until the transaction commits.
−	==Food constituents==	+	===Hybrid Transactional memory (HyTM)===
−	===Carbohydrates===	+	*The HyTM approach is to provide an STM implementation that does not depend on hardware support beyond what is widely available today, and also to provide the ability to execute transactions using whatever HTM support is available in such a way that the two types of transactions can coexist correctly.
−	Carbohydrates come from a wide array of foods - bread, beans, milk, popcorn, potatoes, cookies, spaghetti, corn, and cherry pie. The most common and abundant are sugars, fibers, and starches. The basic building block of a carbohydrate is a sugar molecule, a simple union of carbon, hydrogen, and oxygen. Starches and fibers are essentially chains of sugar molecules.	+	*The key idea to achieving correct interaction between software transactions and hardware transactions is to augment hardware transactions with additional code that ensures that the transaction does not commit if it conflicts with an ongoing software transaction.
−	Carbohydrates were grouped into two main categories:	+	====Phased Transactional Memory (PhTM)====
−	* Simple carbohydrates included sugars such as fruit sugar (fructose), corn or grape sugar (dextrose or glucose), and table sugar (sucrose).	+	*[http://research.sun.com/scalable/pubs/TRANSACT2007-PhTM.pdf Phased Transactional Memory (PhTM])supports switching between different “phases”, each implemented by a different form of transactional memory support. PhTM allows to adapt between a variety of different transactional memory implementations.
−	* Complex carbohydrates included everything made of three or more linked sugars.	+
−	[[image:diabetes food pyramid.jpeg|center|600 px|thumb|Diabetes Food Pyramid ([http://www.diabetes.org/nutrition-and-recipes/nutrition/foodpyramid.jsp Source])]]	+	====Nonblocking Zero-Indirection Transactional Memory (NZTM)====
−	'''Examples'''	+	*[http://research.sun.com/scalable/pubs/TRANSACT2007-NZTM.pdf Nonblocking Zero-Indirection Transactional Memory (NZTM)] is a nonblocking, zero-indirection object-based hybrid transactional memory system. NZTM can execute transactions using best-effort hardware transactional memory or by using compatible software transactional memory system.
−	* Simple Carbohydrates	+
−	** Fruit juices	+
−	** Jams, jellies	+
−	** Candy	+
−	** Sugar, maple syrup, honey	+
−	** Sweeteners in food: dextrose, high fructose, corn syrup	+
−	** Kool-Aid	+
−	** Cakes, pies, cookies, ice cream, pudding	+
−		+
−	* Complex Carbohydrates	+
−	** Whole grain breads, crackers	+
−	** Rice	+
−	** Pasta	+
−	** Tortillas	+
−	** Beans	+
−	** Corn, peas, lima beans	+
−	Foods contain three major types of nutrients: carbohydrates (carbs), proteins and fats. Carbohydrate foods most often come from plants, such as fruits, vegetables and grains. Carbohydrates are chains of sugar molecules; thus, they have the greatest effect on blood-sugar levels when these chains are digested (broken down).	+	====[http://research.microsoft.com/~larus/Papers/p80-larus.pdf Hardware-Accelerated STM (HASTM)]====
		+	*Hardware-Accelerated STM (HASTM) system proposes hardware support to reduce the overhead of STM instrumentation. The supplementary hardware allows software to build fast filters that could accelerate the common case of read set maintenance.
		+	*HASTM provides the STM with two capabilities through per-thread mark bits at the granularity of cache blocks.
		+	*'''Conflict detection:''' Software can check if a mark bit was previously set for a given block of memory and that no other thread wrote to the block since it was marked.
		+	*'''Validation:''' Software can query if potentially there were writes by other threads to any of the memory blocks that the thread marked.
−	Complex carbohydrates are longer chains of sugars. They are absorbed more slowly into the blood and cause a slower change in blood sugar than simple carbohydrates. 90-100% of the carbohydrate (CHO) eaten converts to sugar (glucose) within 15 minutes to 1.5 hours. Only 58% of the ingested protein, and less than 10% of fat, are converted into sugar within several hours after consumption. [http://www.mfm-evms.org/dm6acarbsdiabetes.html Source]	+	====[http://research.microsoft.com/~larus/Papers/p80-larus.pdf Signature-Accelerated STM (SigTM)]====
−		+	*[http://portal.acm.org/citation.cfm?id=1250673 Signature-Accelerated STM (SigTM)]uses hardware signatures to encode the read set and write set for software transactions. A hardware Bloom filter outside of the caches computes the signatures.b Software instrumentation provides the filters with the addresses of the objects read or written within a transaction. To detect conflicts, hardware in the computer monitors coherence traffic for requests for exclusive accesses to a cache block, which indicates a memory update.
−	[[image:carbohydrates types.jpeg|center|thumbs|800 px]]	+	*The hardware tests if the address in a request is potentially in a transaction’s read or write set by examining the transaction’s signatures. If so, the memory reference is a potential conflict and the STM can either abort a transaction or turn to software validation.
−	====Carbohydrates and the Glycemic Index====	+	----
−	A new system for classifying carbohydrates known as the glycemic index, measures how fast and how far blood sugar rises after you eat a food that contains carbohydrates	+
−	White bread, for example, is converted almost immediately to blood sugar, causing it to spike rapidly. It's classified as having a high glycemic index. Brown rice, in contrast, is digested more slowly, causing a lower and more gentle change in blood sugar. It has a low glycemic index.
−	Diets filled with high-glycemic-index foods, which cause quick and strong increases in blood sugar levels, have been linked to an increased risk for both diabetes and heart disease. [http://www.hsph.harvard.edu/nutritionsource/carbohydrates.html Source]
−	'''Glycemic Index'''	+	==Search strategy==
		+	=== English Search concepts===
		+	{|border="2" cellspacing="0" cellpadding="4" width="100%"
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="4%"| <center>'''S. No.'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Transactional memory'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Atomic memory transactions'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Concurrency control'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Shared memory access'''</center>
−	The glycemic index measures how fast a food is likely to raise your blood sugar. This can be helpfu. For example, if your blood sugar is low and continuing to drop during exercise, you would prefer to eat a carb that will raise your blood sugar quickly. On the other hand, if you would like to keep your blood sugar from dropping during a few hours of mild activity, you may prefer to eat a carb that has a lower glycemic index and longer action time. If your blood sugar tends to spike after breakfast, you may want to select a cereal that has a lower glycemic index.	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''1'''</center>
		+	| style="padding:0.079cm;"| Transactional memory
		+	| style="padding:0.079cm;"| Atomic memory transactions
		+	| style="padding:0.079cm;"| Concurrency control
		+	| style="padding:0.079cm;"| Shared memory synchronization
−	'''Factors that influence how quickly the carbohydrates in food raise blood sugar include:'''	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''2'''</center>
		+	| style="padding:0.079cm;"| Transactional execution AND memory
		+	| style="padding:0.079cm;"| Atomically memory accesses
		+	| style="padding:0.079cm;"| Concurrent computing
		+	| style="padding:0.079cm;"| Shared memory access
−	* Fiber content. Fiber shields the starchy carbohydrates in food immediate and rapid attack by digestive enzymes. This slows the release of sugar molecules into the bloodstream.	+	|-
−	* Ripeness. Ripe fruits and vegetables tend to have more sugar than unripe ones, and so tend to have a higher glycemic index.	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''3'''</center>
−	* Type of starch. Starch comes in many different configurations. Some are easier to break into sugar molecules than others. The starch in potatoes, for example, is digested and absorbed into the bloodstream relatively quickly.	+	| style="padding:0.079cm;"| Hybrid transactional memory
−	* Fat content and acid content. The more fat or acid a food contains, the slower its carbohydrates are converted to sugar and absorbed into the bloodstream.	+	| style="padding:0.079cm;"|
−	* Physical form. Finely ground grain is more rapidly digested, and so has a higher glycemic index, than more coarsely ground grain.	+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	'''Carbohydrates and the Glycemic Load'''	+	|-
−	* Low Glycemic Load	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''4'''</center>
−	** High-fiber fruits and vegetables (not including potatoes)	+	| style="padding:0.079cm;"| Software transactional memory
−	** Bran cereals (1 oz)	+	| style="padding:0.079cm;"|
−	** Many legumes, including chick peas, kidney beans, black beans, lentils, pinto beans (5 oz cooked, approx. 3/4 cup)	+	| style="padding:0.079cm;"|
−	* Medium Glycemic Load	+	| style="padding:0.079cm;"|
−	** Pearled barley: 1 cup cooked	+
−	** Brown rice: 3/4 cup cooked	+
−	** Oatmeal: 1 cup cooked	+
−	** Bulgur: 3/4 cup cooked	+
−	** Rice cakes: 3 cakes	+
−	** Whole grain breads: 1 slice	+
−	** Whole-grain pasta: 1 ¼ cup cooked	+
−	** No-sugar added fruit juices: 8 oz	+
−	* High Glycemic Load	+
−	** Baked potato	+
−	** French fries	+
−	** Refined cereal products: 1 oz	+
−	** Sugar-sweetened beverages: 12 oz	+
−	** Jelly beans: 10 large or 30 small	+
−	** Candy bars: 1 2-oz bar or 3 mini bars	+
−	** Couscous: 1 cup cooked	+
−	** Cranberry juice cocktail: 8 oz	+
−	** White basmati rice: 1 cup cooked	+
−	** White-flour pasta: 1¼ cup cooked	+
−	====Carbohydrates and Diabetes====	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''5'''</center>
		+	| style="padding:0.079cm;"| Hardware transactional memory
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	The long-held belief that eating foods containing "sugar" (sweets) will cause your blood glucose levels to rise higher and more quickly than starchy foods (bread, rice, pasta, etc.) has not been supported by scientific evidence. Both are forms of carbohydrates and both cause blood glucose to increase.	+	|}
−	Research has shown that your total daily amount of carbohydrate intake affects your blood glucose levels. Carbohydrates have the most immediate effect on blood glucose levels, since carbohydrates are broken down into glucose (sugar) early during digestion. It is important to eat the suggested amount of carbohydrate at each meal, along with some protein, and fat.	+	=== French Search concepts===
		+	{|border="2" cellspacing="0" cellpadding="4" width="100%"
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="4%"| <center>'''S. No.'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Transactional memory'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Atomic memory transactions'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Concurrency control'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Shared memory access'''</center>
−	Carbohydrates are mainly found in three food groups: Fruit; Milk and Yogurt; and Bread, Cereal, Rice, Pasta and Starchy Vegetables. You will need to consider the total amount of carbohydrates when working out your daily meal plan.	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''1'''</center>
		+	| style="padding:0.079cm;"| mémoire transactionnelle
		+	| style="padding:0.079cm;"| opérations&nbsp;de mémoire&nbsp;atomique
		+	| style="padding:0.079cm;"| contrôle de&nbsp;concurrence
		+	| style="padding:0.079cm;"| La synchronisation de mémoire partagée
−	'''Carbohydrate counting'''	+	|-
−	Counting grams of carbohydrate and evenly distributing them at meals will help you manage your blood glucose. Carbohydrate counting is a method of meal planning that is a simple way to keep track of the amount of total carbohydrate you eat each day. Instead of following an exchange list, you monitor how much carbohydrate (sugars and starches) you eat daily. One carbohydrate choice is equal to 15 grams of carbohydrate. Note: your consumption of protein and fat still counts as calories.	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''2'''</center>
		+	| style="padding:0.079cm;"| l'exécution&nbsp;des transactions AND mémoire
		+	| style="padding:0.079cm;"| accès à la mémoire&nbsp;atomique
		+	| style="padding:0.079cm;"| programmation concurrente
		+	| style="padding:0.079cm;"| Accès à la mémoire partagée
−	With carbohydrate counting, you can pick up almost any food product off the shelf, read the label, and use the information about grams of carbohydrate to fit the food into your meal plan.	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''3'''</center>
		+	| style="padding:0.079cm;"| hybride&nbsp;mémoire transactionnelle
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	Carbohydrate counting is most useful for people who take multiple daily injections of insulin, use an insulin pump, or who want more flexibility and variety in their food choices. The amount and type of insulin you are prescribed may affect the flexibility of your meal plan.	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''4'''</center>
		+	| style="padding:0.079cm;"| mémoire&nbsp;logiciel transactionnel
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	A registered dietitian can help you determine how much carbohydrate, as well as other foods, you should include in your daily meal plan.	+	|-
		+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''5'''</center>
		+	| style="padding:0.079cm;"| mémoire matérielle transactionnel
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	Carbohydrate counting may not be for everyone, and the traditional method of following food exchange lists may be used instead.	+	|}
−	===Fiber===	+	=== German Search concepts===
−	Fiber is the indigestible part of plant foods that plays an important role in the digestive process. Fiber helps move foods along the digestive tract and adds bulk to stool to speed its passage through the bowel and promote regular bowel movements. Fiber also delays sugar absorption, helping to better control blood glucose levels. In addition, fiber binds with cholesterol and may reduce the level of cholesterol in the blood. Lastly, fiber helps prevent constipation and reduces the risk of certain intestinal disorders.	+	{|border="2" cellspacing="0" cellpadding="4" width="100%"
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="4%"| <center>'''S. No.'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Transactional memory'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Atomic memory transactions'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Concurrency control'''</center>
		+	| style="background-color:#B6DDE8;padding:0.079cm;" width="20%"| <center>'''Shared memory access'''</center>
−	The goal for all Americans is to consume 25 to 35 grams of fiber per day. The best way to increase your fiber intake is to eat more of these fiber-rich foods:	+	|-
−	* Fresh fruits and vegetables	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''1'''</center>
−	* Cooked dried beans and peas	+	| style="padding:0.079cm;"| transaktionalen Speicher
−	* Whole grain breads, cereals, and crackers	+	| style="padding:0.079cm;"| Atom-Speicher-Transaktionen
−	* Brown rice	+	| style="padding:0.079cm;"| Concurrency Kontrolle
−	* Bran products	+	| style="padding:0.079cm;"| Shared-Memory-Synchronisation
−	[http://www.clevelandclinic.org/health/health-info/docs/2600/2619.asp?index=9825 Source]	+	|-
−	===Cheese===	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''2'''</center>
−	* Glycemic Index: 60	+	| style="padding:0.079cm;"| transaktionale&nbsp;Ausführung AND Speicher
−	* Glycemic Index Rating: Medium	+	| style="padding:0.079cm;"| atomar&nbsp;Speicherzugriffe
−	* Glycemic Response to Cheese Pizza: Carbs in Cheese Pizza have a medium effect on blood sugar levels.	+	| style="padding:0.079cm;"| Concurrent&nbsp;Computing
−	* Constituents: protein, calcium, riboflavin and fat (as a cup of whole milk - Lactose sugar)	+	| style="padding:0.079cm;"| Shared-Memory-Zugriff
−	===Proteins===	+	|-
−	Beans and legumes are another excellent source of protein for humans. Beans do not contain all the essential amino acids when cooked in their usual manner, but through sprouting (link to sprouting) them you can enjoy a full spectrum of amino acids in an alkaline forming low glycemic index food. [http://www.ortogo.com/php/learning/build_art.php?67 Source]	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''3'''</center>
		+	| style="padding:0.079cm;"| Hybrid&nbsp;transaktionalen Speicher
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	===Vegetables===	+	|-
−	Vegetables contain low glycemic, often considered “free food” carbohydrate sources. [http://www.ortogo.com/php/learning/build_art.php?67 Source]	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''4'''</center>
		+	| style="padding:0.079cm;"| Software&nbsp;transaktionalen Speicher
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	===Legumes===	+	|-
−	Legumes are a dense source of carbohydrate and certain amino acids. They are rich in fiber which helps to keep you clean on the inside. Low on the glycemic index legumes are a great source of energy for an active body. Legumes: Almost all legumes have a moderate glycemic index. They also provide a source of water-soluble fiber that is valuable for lowering cholesterol. They also provide phytoestrogens, which may provide health benefits. [http://www.findarticles.com/p/articles/mi_nhi4446/is_10/ai_n16083623/pg_6 Source]	+	| style="background-color:#B6DDE8;padding:0.079cm;"| <center>'''5'''</center>
		+	| style="padding:0.079cm;"| Hardware transaktionalen Speicher
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
		+	| style="padding:0.079cm;"|
−	===Dairy products===	+	|}
−	Most dairy products have a low glycemic index. However, some people do not tolerate dairy very well.	+
−	[http://www.findarticles.com/p/articles/mi_nhi4446/is_10/ai_n16083623/pg_6 Source]	+
−	===Fruits===
−	Fruits are generally in the middle of the road in terms of glycemic index; but dried fruits, which are concentrated, have a higher index. Drinking fruit juices will definitely increase blood sugar release. Therefore, fruit juices should be limited or diluted with three-fourths water. [http://www.findarticles.com/p/articles/mi_nhi4446/is_10/ai_n16083623/pg_6 Source]
−	Most sweeteners such as honey, molasses, sugar, and white grape juice concentrate tend to have a high glycemic index. Rice syrup and granulated rice sweeteners may be used instead. The artificial sweetener aspartame may increase insulin resistance over time. [http://www.findarticles.com/p/articles/mi_nhi4446/is_10/ai_n16083623/pg_6 Source]	+	===Search strings===
		+	{|border="2" cellspacing="0" cellpadding="4" width="100%" align="left"
		+	|align = "center" bgcolor = "#FFFF99"|'''Concepts'''
		+	|align = "center" bgcolor = "#FFFF99"|'''Scope'''
		+	|align = "center" bgcolor = "#FFFF99"|'''Search string'''
		+	|align = "center" bgcolor = "#FFFF99"|'''No of hits'''
		+	|align = "center" bgcolor = "#FFFF99"|''' '''
		+	|-
		+	|align = "center" bgcolor = "#FFFF99"|'''Transactional memory'''
		+	|rowspan = "3"|'''Search scope:''' US Granted US Applications EP-A EP-B WO JP DE-C,B DE-A DE-T DE-U GB-A FR-A; <br>'''Claims, Title or Abstract'''<br>'''Years: '''1836-2008
		+	|(transactional ADJ memory) OR ((transactional ADJ execution) SAME memory)
		+	|align = "center"|'''167'''
		+	|
		+	|-
		+	|align = "center" bgcolor = "#FFFF99"|'''Other Keywords'''
		+	|(atomic<nowiki>*</nowiki>4 NEAR2 memory NEAR2 (transaction<nowiki>*</nowiki>1 OR access<nowiki>*</nowiki>2)) OR (((concurrency ADJ control) OR (concurrent ADJ computing)) WITH ((shared ADJ memory) AND (synchronization OR access<nowiki>*</nowiki>2)))
		+	|align = "center"|'''24'''
		+	|
		+	|-
		+	|align = "center" bgcolor = "#FFFF99"|'''Final'''
		+	|align = "center"|'''1 OR 2'''
		+	|align = "center"|'''82 unique (189 patents including families)'''
		+	|
		+	|-
		+	|}<br clear="all">
−	===Grains===	+	----
−	Grains such as rice, wheat, and corn tend to have a high glycemic index, but grains such as buckwheat, millet, barley, rye, and bulgur are actually quite low. For successful weight loss and blood sugar control, this group of foods should be used in moderation. Also, the addition of fats such as olive oil or butter (in moderation) can lower the glycemic index. [http://www.findarticles.com/p/articles/mi_nhi4446/is_10/ai_n16083623/pg_6 Source]	+
−	==Regulation of glycemic index ==	+	==IP Trend==
−	Factors Affecting Glycemic Index of Foods are:	+	*75 patents published in the last 10 years.
−	===Soluble fiber===	+	*Patent filing is more in the last 4 years(75 %)
−	The gel-forming property of soluble fiber sources such as oats and barley has been proposed as the mechanism by which these grains reduce both cholesterol and glucose and insulin responses.	+
−	The high viscosity of the solution containing oat gum was concluded to be the property which delays gastric emptying and/or intestinal absorption resulting in these lower responses	+	[[Image:Year_wise_graph-Transactional_memory.jpg|align|thumb|center|500px|Year wise graph]]
−	===Starch structure===	+
−	Starch is composed of long chains of glucose (amylose) and highly branched chains of glucose (amylopectin). Hydrolysis of amylose would therefore result in fewer glucose molecules’ being freed at once than the hydrolysis of the highly branched amylopectin chains. Thus, high amylose content grains result in lower glucose responses than those which have a high content of amylopectin.	+
−	=== Particle size===	+
−	Boiled whole kernels and larger particle sizes are associated with lower glucose and insulin responses for a variety of grain sources.	+
−	'''Conclusion'''	+	----
−	* The greater the particle size, the lower the glucose and insulin response.	+
−	* The greater the level of processing and refining, the higher the response.	+
−	* Grains with high levels of soluble beta glucans such as oats, rye and barley are generally more effective in improving insulin sensitivity than wheat, which contains predominantly insoluble dietary fiber.	+
−	* The high viscosity of these soluble fibers is partially responsible for these beneficial effects.	+
−	* Corn and rice can have either high or low glycemic indices because their amylose and amylopectin contents vary.	+
−	* Higher amylose content results in lower glucose and insulin responses.	+
−	* Replacing low fiber grain foods such as cornflakes or white bread with whole grain higher fiber or higher amylose content products will reduce risk of developing insulin resistance and obesity and improve the health of the American population.	+
−	'''Potential mechanisms whereby high-glycemic-load diets could increase risk of type 2 diabetes'''	+	==Key companies==
−	[[image:Potential mechanisms whereby high-glycemic-load diets could increase risk of type 2 diabetes.jpeg|thumb|center|800 px]]	+	* Intel(26 patents) and Sun Microsystems (19 patents) are major players.
		+	* Microsoft(11 patents) and IBM(7 patents) are next to them.
−	==Overview of U.S. Food Customs and Terminology ==	+	[[Image:Assignee_graph-Transactional_memory.jpg|align|thumb|center|500px|Top Assignees]]
−	[http://www.uta.fi/FAST/US1/REF/usfood.html Source]	+
−	===Overview: Traditional "typical" meals===	+	----
−	* Breakfast: O.J., bacon and eggs, sausage, pancakes, waffles, toast/french toast, cold cereals, oatmeal or cream of wheat, yogurt, applesauce, milk, coffee	+
−	* Brunch: above plus bagels & lox, fruits, Danish rolls	+
−	* Lunch: soup and sandwiches, cottage cheese, fruit	+
−	* Sandwich types: BLT, PBJ, tuna salad, egg salad, hero, submarine, grinder, hoagy, poor-boy, "Dagwood sandwich", Reuben sandwish, corned-beef, pita	+
−	* Dinner: fried chicken, steak, roast beef/pork, 2 vegetables (mashed potatos, corn, beans, peas, carrots, broccoli), tossed salad, cole slaw, jello "salads", dessert (apple pie [á la môde], cobbler, ice cream, cake).	+
−	* Meal drinks: coffee, iced tea, [iced coffee], beer, wine, milk, water, soft drinks	+
−	* Supper: hash, stew, hot sandwiches, leftovers	+
−	===Holiday meals===	+	==Top IPC and US Classes==
−	* Thanksgiving: turkey and dressing, cranberry sauce, sweet potato casserole, corn, beans, peas, pumpkin pie ...	+	*'''Top IPC class:''' G06F
−	* Christmas: ham, turkey, fruitcake, mincemeat pie, Christmas stollen, egg nog, mulled wine,	+
−	* Independence Day: picnics with hot dogs, hamburgers, potato chips, pickles, roasted marshmallows, potato salad, 3-bean salad, pork & beans, ice cream, pie	+
−	* "Traditional" foods: succotash, squash, yams, sweet potatos, chili, corn bread, corn sticks, spoon bread, strawberry shortcake, fried catfish, sourdough bread	+
−	=== Food trends in recent years===	+	[[Image:IPC_class-Transactional_memory.jpg|align|thumb|center|500px|IPC class]]
−	* More fast-food restaurants, McDonalds, Burger King, Col. Sanders' Kentucky Fried Chicken, Arby's Roast Beef, Long John Silver's seafood, Domino's Pizza, Pizza Hut, Godfather's Pizza, Taco Bell, Roy Rogers, Orange Julius, Subway Shoppe, Au Bon Pain	+
−	* 24-hour 'convenience' restaurants, such as Denney's, Interstate Pancake House, Howard Johnson's (HoJo)	+
−	* Oriental restarants — take-out or dine-in	+
−	* "Power breakfasts," "brown-bag lunches," no-host bars	+
−	* "De-caf" coffee (and tea), more consumption of fish, grilled swordfish, etc.; rise of Mexican food dishes	+
−	===Vast differences in U.S. regional & ethnic food cultures===	+	*'''Top US class:''' 711, 707, 712, 717, 718
−	* German, Polish, Scandinavian cultures in Midwest	+	[[Image:US_class-Transactional_memory.jpg|align|thumb|center|500px|US class]]
−	* French cuisine around New Orleans, Maine	+
−	* Mexican/Spanish in Southwest, Florida	+
−	* Chinese, Japanese, Vietnamese, Thai in West/South	+
−	* Indian, Pakistani, Afghan, Ethiopian, etc. in East	+
−	* Native American Indian, etc., throughout U.S.	+
−	* Cuban, Puerto Rican, South American in Florida	+
−	===Selected Main Courses===
−	* Meatloaf, meatballs, creamed chipped beef,
−	* Ham (sugar-cured, "picnic," "rolled," "country", Virginia)
−	* Spaghetti & meatballs, macaroni & cheese
−	* Quiche, Turf & Surf, spareribs
−	* Chicken (fried, barbequed, fricasseed, roasted, grilled)
−	* Turkey (Butterball), duck, goose, lamb, pork
−	* Caesar salad, Chef's salad, chicken salad, tuna salad
−	* Catfish, lobster, salmon, trout, shrimp, swordfish, cod
−	===Selected Side Dishes===	+	----
−	* Beans (baked, green, lima, string, wax, kidney, shell, fava)	+
−	* Peas (green, in-the-pod, black-eyed, lentils, chickpeas)	+
−	* Zzucchini, other squashes	+
−	* Corn (on the cob, whole-kernel, creamed, hominy, grits)	+
−	* Succotash (corn & lima beans together)	+
−	* Rice (white, brown, wild; steamed, creamed, boiled, fried)	+
−	* Broccoli, asparagus, okra, spinach, kohlrabi, turnips, chard	+
−	* Noodles, macaroni, dumplings, potato pancakes	+
−	* Cottage cheese, sliced fruit	+
−	===Selected Soups===	+	==Sample analysis==
−	* Clam chowder, chicken, chicken-noodle, black bean, pea	+	{|border="2" cellspacing="0" cellpadding="4" width="100%"
−	* Tomato soup, creamed celery/potato soups, onion/cheese soups	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">S.No.</font>
−	* Gumbos, jambalayas, vichyssoise, Scotch broth, shrimp bisque	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">Patent/Publication No.</font>
−		+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">Title</font>
−	===Selected Desserts===	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">Transactional memory</font>
−	* Various pies, cakes, cobblers, cookies, puddings, custards	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">Summary</font>
−	* ice cream, sherbet, frozen yogurt, brownies, fudge, mousse	+	|-
−	* fruit compotes, melons, baked alaska, muffins, crepes, soufflés	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">1</font>
−		+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220040015642%22.PGNR.&OS=DN/20040015642&RS=DN/20040015642 US20040015642A1]</u></font>
−	===Party and Reception or other "Occasion" Foods===	+	|Software transactional memory for dynamically sizable shared data structures
−	* Hors d'oeuvres, dips, guacamole, pretzels, bread sticks, (cocktail party 'finger food')	+	|align = "center"|Dynamic STM (DSTM)
−	* Chicken wings, quiches, meatballs, turkey or ham or chicken 'rolls' or 'logs'	+	|A software transactional memory that allows concurrent non-blocking access to a dynamically sizable data structure defined in shared storage managed by the software transactional memory is described. The implementation is called dynamic software transactional memory (DSTM). DSTM techniques allow transactions and transactional objects to be created dynamically. The non-blocking property considered here is obstruction-freedom.
−	* Frankfurters, potato chips & salad, dill pickles, french fries	+	|-
−	* Toasted marshmallows, peanut butter fudge/brittle, popcorn balls, "s'mores"	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">2</font>
−	* Frog legs, mountain oysters,	+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20060085591.PGNR.&OS=DN/20060085591&RS=DN/20060085591 US20060085591A1]</u></font>
−		+	|Hybrid hardware and software implementation of transactional memory access
−	===Common Ethnic Foods===	+	|align = "center"|Phased Transactional Memory (PhTM)
−	* Tortillas, enchiladas, tacos, burritos, tamales, nachos	+	|The invention relates to a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
−	* Knockwurst, kielbasa, sauerkraut,	+	|-
−	* Lasagne, canneloni, pastas, manicotti, ravioli, vermicelli	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">3</font>
−		+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20070028056.PGNR.&OS=DN/20070028056&RS=DN/20070028056 US20070028056A1]</u></font>
−	===African-American "Soul" Food Examples===	+	|Direct-update software transactional memory
−	* Black-eyed peas and ham hocks, chitterlings, pork neck bones and sauerkraut, fried catfish, oxtail soup	+	|align = "center"|Dynamic STM (DSTM)
−	* Biscuits, corn bread	+	|A transactional memory programming interface allows a thread to directly and safely access one or more shared memory locations within a transaction while maintaining control structures to manage memory accesses to those same locations by one or more other concurrent threads. Each memory location accessed by the thread is associated with an enlistment record, and each thread maintains a transaction log of its memory accesses.
−	* Collard greens, fried okra, grits	+	|-
−	* Sweet potato pie	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">4</font>
−		+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20070156780.PGNR.&OS=DN/20070156780&RS=DN/20070156780 US20070156780A1]</u></font>
−	==Wheat processing==	+	|Protecting shared variables in a software transactional memory system
−	AX-rich fiber was extracted from the byproduct of wheat-flour processing. Arabinoxylan (AX) is a hemicellulose that has a xylose backbone with arabinose side chains. Postprandial glucose and insulin responses were improved by ingestion of AX-rich fiber. Further research is required to determine whether AX-rich fiber is of benefit to people with type 2 diabetes. [http://www.ajcn.org/cgi/content/full/71/5/1123 Source]	+	|align = "center"|Dynamic STM (DSTM)
−	==Digestive system==	+	|For a variable accessed at least once in a software-based transactional memory system (STM) defined (STM-defined) critical region of a program, modifying an access to the variable that occurs outside any STM-defined critical region system by starting a hardware based transactional memory based transaction, within the hardware based transactional memory based transaction, checking if the variable is currently owned by a STM transaction, If the variable is not currently owned by a STM transaction, performing the access and then committing the hardware based transactional memory transaction and if the variable is currently owned by a STM transaction, performing a responsive action.
−	<table align=center>	+	|-
−	<tr>	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">5</font>
−	<td>[[image:digestion of food.jpeg|thumb|left|center|450 px]] </td>	+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20070156994.PGNR.&OS=DN/20070156994&RS=DN/20070156994 US20070156994A1]</u></font>
−	<td>[[image:key.gif|thumb|right|center|300 px]] </td>	+	|Unbounded transactional memory systems
−	</tr>	+	|align = "center"|Unbounded Hardware Transactional Memory (UHTM)
−	</table>	+	|Methods and apparatus to provide unbounded transactional memory systems are described. Transactional memory is implemented through a table lookup mechanism. To access a shared resource, a thread may first check a table stored in memory to determine whether another thread is accessing the same portion of the shared resource. Accessing a table that is stored in memory may generate overhead that decreases performance.
−	[[Detailed information on breakdown of food and fat]]	+	|-
−		+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">6</font>
−	==Metabolic pathways==	+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20070239942.PGNR.&OS=DN/20070239942&RS=DN/20070239942 US20070239942A1]</u></font>
−	[[image:metabolic pathway1.gif|center|700 px|thumb]]	+	|Transactional memory virtualization
−	[[image:metabolic pathway.gif|center|700 px|thumb]]	+	|align = "center"|Virtualized Transactional Memory (VTM)
−	==Glucose regulation==	+	|Methods and apparatus to provide transactional memory execution in a virtualized mode are described. Data corresponding to a transactional memory access request is stored in a portion of a memory after an operation corresponding to the transactional memory access request causes an overflow and a stored value may be updated for an occurrence of the overflow.
−		+	|-
−	[[image:image10.gif|center|700 px|thumb]]	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">7</font>
−		+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20070300238.PGNR.&OS=DN/20070300238&RS=DN/20070300238 US20070300238A1]</u></font>
−	==Insulin overview==	+	|Adapting software programs to operate in software transactional memory environments
−	===Insulin secretion===	+	|align = "center"|Dynamic Software Transactional Memory 2.0 (DSTM2)
−	Insulin secretion in beta cells is triggered by rising blood glucose levels. Starting with the uptake of glucose by the GLUT2 transporter, the glycolytic phosphorylation of glucose causes a rise in the ATP:ADP ratio. This rise inactivates the potassium channel that depolarizes the membrane, causing the calcium channel to open up allowing calcium ions to flow inward. The ensuing rise in levels of calcium leads to the exocytotic release of insulin from their storage granule.	+	|Software transactional memory is used in non-managed language environments and with legacy codes without requiring a software programmer to change the programming paradigm they are currently used to. STM adapter system automatically transforms all the binary code executed within that block to execute atomically. STM adapter system automatically transforms lock-based critical sections in existing binary code to atomic blocks,
−		+	|-
−	[[image:image11.jpeg|center|700 px|thumb]]	+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">8</font>
		+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20080005504.PGNR.&OS=DN/20080005504&RS=DN/20080005504 US20080005504A1]</u></font>
		+	|Global overflow method for virtualized transactional memory
		+	|align = "center"|Virtualized Transactional Memory (VTM)
		+	|A method and apparatus for virtualizing and/or extending transactional memory is described. Transactions are executed using local shared transactional memory, such as a cache memory. Upon overflowing the shared transactional memory, the transactional memory is virtualized and/or extended into a higher-level memory, such as a system memory.
		+	|-
		+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">9</font>
		+	|align = "center"|<font color="#0000FF"><u>[http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&f=G&l=50&d=PG01&p=1&S1=20080098374.PGNR.&OS=DN/20080098374&RS=DN/20080098374 US20080098374A1]</u></font>
		+	|Method and apparatus for performing dynamic optimization for software transactional memory
		+	|align = "center"|Dynamic STM (DSTM)
		+	|The present invention relates to a method and apparatus for performing dynamic optimization for STM. An optimistically immutable field is determined in the transaction to write. The transaction optimization unit keeps track of the status of object and class fields in a transaction. The transaction optimization unit invalidates methods corresponding to an optimistically immutable field in response to determining that the field has been written to and is therefore not immutable.
		+	|-
		+	|align = "center" bgcolor = "#969696"|<font color="#00FFFF">10</font>
		+	|align = "center"|<font color="#0000FF"><u>[http://www.wipo.int/pctdb/en/fetch.jsp?LANG=ENG&DBSELECT=PCT&SERVER_TYPE=19-10&SORT=41253138-KEY&TYPE_FIELD=256&IDB=0&IDOC=1629252&C=10&ELEMENT_SET=B&RESULT=1&TOTAL=1&START=1&DISP=25&FORM=SEP-0/HITNUM,B-ENG,DP,MC,AN,PA,ABSUM-ENG&SEARCH_IA=US2008050081&QUE WO2008088931A2]</u></font>
		+	|FACILITATING EFFICIENT TRANSACTIONAL MEMORY AND ATOMIC OPERATIONS VIA CACHE LINE MARKING
		+	|align = "center"|Hardware-Accelerated STM (HASTM)-Conflict detection
		+	|The system starts by executing a transaction for a thread, wherein executing the transaction involves placing load-marks on cache lines which are loaded during the transaction and placing store-marks on cache lines which are stored to during the transaction. Upon completing the transaction, the system releases the load-marks and the store-marks from the cache lines which were load-marked and store-marked during the transaction. Note that during the transaction, the load-marks and store-marks prevent interfering accesses from other threads to the cache lines.
		+	|-
		+	|}
−	===How insulin works===
−	Insulin molecules circulate throughout the blood stream until they bind to their associated (insulin) receptors. The insulin receptors promote the uptake of glucose into various tissues that contain type 4 glucose transporters (GLUT4). Such tissues include skeletal muscles (which burn glucose for energy) and fat tissues (which convert glucose to triglycerides for storage). The initial binding of insulin to its receptor initiates a signal transduction cascade that communicates the message delivered by insulin: remove glucose from blood plasma (see panel 3). Among the wide array of cellular responses resulting from insulin ‘activation,’ the key step in glucose metabolism is the immediate activation and increased levels of GLUT4 glucose transporters. By the facilitative transport of glucose into the cells, the glucose transporters effectively remove glucose from the blood stream. Insulin binding results in changes in the activities and concentrations of intracellular enzymes such as GLUT4. These changes can last from minutes to hours.
−	As important as insulin is to preventing too high of a blood glucose level, it is just as important that there not be too much insulin and hypoglycemia. As one step in monitoring insulin levels, the enzyme insulinase (found in the liver and kidneys) breaks down blood-circulating insulin resulting in a half-life of about six minutes for the hormone. This degradative process ensures that levels of circulating insulin are modulated and that blood glucose levels do not get dangerously low.	+	----
−	[[image:image12.jpeg|center|700 px|thumb]]	+
−	Insulin binding to the insulin receptor induces a signal transduction cascade which allows the glucose transporter (GLUT4) to transport glucose into the cell.	+
−	== Analysis of Oreo cookies ==	+	==Patent dashboard==
−	===Key ingredient of Oreo cookies===	+	'''[https://www.dolcera.com/auth/dashboard/dashboard.php?workfile_id=388 Patent Categorization in Dashboard]'''
−	Identifies the various ingredients of the Oreo cookies. The high fructose corn syrup and wheat flour have high glycemic index and are problematic to the diabetes. Thus we have done further deep dive on high fructose corn syrup and wheat flour	+
−		+
−	[[image:Key ingredient of Oreo cookies.jpeg|center|thumb|500 px]]	+
−		+
−	===Substitutes for High fructose corn syrup===	+
−	[[image:Substitutes for High fructose corn syrup.jpeg|center|thumb|500 px]]	+
−		+
−	===Substitutes for wheat flour===	+
−	[[image:Substitutes for wheat flour.jpeg|center|thumb|500 px]]	+
−		+
−	===Mitigation - High fructose corn syrup===	+
−	[[image:Mitigation - High fructose corn syrup.jpeg|center|thumb|500 px]]	+
−		+
−	===Mitigation – Wheat flour===	+
−	[[image:Mitigation–Wheat flour.jpeg|center|thumb|500px]]	+
−		+
−	===Products substitute for High fructose corn syrup===	+
−		+
−	[[image:Products substitute for High fructose corn syrup.jpeg|center|thumb|500px]]	+
−		+
−	===Products substitute for wheat flour===	+
−		+
−	[[image:Products substitute for wheat flour.jpeg|center|thumb|500px]]	+
−		+
−	==Presentation==	+
−	* Slideset: [[Media: Diabetes - Oreo Cookies ver3.ppt|Oreo Cookies and the sweeteners used in them]]	+
−	* Slideset: [[Media: Diabetes - first draft.ppt|First draft]]	+
		+	==<span style="color:#C41E3A">Like this report?</span>==
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		+	'''Dolcera can provide a comprehensive report customized to your needs'''</p>
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Latest revision as of 08:08, 27 July 2015

Background

Transactional memory

• Transactional memory is a general and flexible way to allow programs to read and modify disparate primary memory locations atomically as a single operation, much as a database transaction can atomically modify many records on disk.
• Transactional memory attempts to simplify parallel programming by allowing a group of load and store instructions to execute in an atomic way. Transactional memory is a concurrency control mechanism analogous to database transactions for controlling access to shared memory in concurrent computing. A transaction is a piece of code that executes a series of reads and writes to shared memory.
• Transactional memory (TM) supports code sections that are executed atomically, i.e., so that they appear to be executed one at a time, with no interleaving between their steps. TM significantly reduces the difficulty of writing correct concurrent programs. A good TM implementation avoids synchronization between concurrently executed transactional sections unless they actually conflict. TM can significantly improve the performance and scalability of concurrent programs, as well as makes them easier to write, understand and maintain.
• Transactional memory generally refers to a synchronization model that allows multiple threads to concurrently access a shared resource (such as a data structure stored in memory) without acquiring a lock as long as the accesses are non-conflicting, for example, as long as the accesses are directed to different portions of the shared resource.

More details

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Transactional programming models

• Transactional programming models can be supported in software using software-based transactional memory (STM), in hardware using hardware- based transactional memory (HTM), or in a combination of the two (Hybrid TM, or HyTM).
  • Software based Transactional memory (STM) can allow sequences of concurrent operations to be combined into atomic transactions, thereby reducing the complexity of both programming and verification. STM is a scheme for concurrent programming with multiple threads that uses transactions similar to those used in databases.
  • Hardware based Transactional memory (HTM) system requires no read or write barriers within the transaction code. The hardware manages data versions and tracks conflicts transparently.
  • Hybrid Transactional memory (HyTM) implements Transactional memory in software so that it can use best-effort Hardware Transactional memory (HTM) to boost performance but does not depend on HTM.

Software based Transactional memory

• Software transactional memory (STM) is implemented in software. All speculative STM transactional data is stored in the system memory and indicated to be in a non-committed state. When the STM transaction commits, any data the transaction writes is indicated as committed and subsequently available to other threads and transactions. In certain STM systems, a flag may be set to indicate the data as committed and accessible and available in memory to other transactions.

DracoSTM

• DracoSTM is a high performance lock-based C++ Software Transactional memory research library. DracoSTM uses only native object-oriented language semantics, increasing its intuitiveness for developers while maintaining high programmability via automatic handling of composition, locks and transaction termination.
• DracoSTM is a lock-based STM system. At its core, DracoSTM uses one lock per thread to implement transactional reads and writes. This allows multiple transactions to simultaneously read and write without blocking other transactions’ progress.

Dynamic STM (DSTM)

• Dynamic Software Transactional Memory (DSTM) is a low-level application programming interface (API) for syn-chronizing shared data without using locks.
• DSTM supports dynamic-sized data structures. DSTM has non-blocking implementation. The non-blocking property is obstruction-freedom. Dynamic means that the set of locations accessed by the transaction is not known in advance and is determined during its execution.
• DSTM techniques allow transactions and transactional objects to be created dynamically.Transactions may determine the sequence of objects to access based on the values observed in objects accessed earlier in the same transaction. DSTM is well suited to the implementation of dynamic-sized data structures such as lists and trees.

Dynamic Software Transactional Memory 2.0 (DSTM2)

• DSTM2 is a Java-based software library that provides a flexible framework for implementing STM. DSTM2 significantly improves the programming interface of its predecessor DSTM. The code is provided in Java libraries and any Java programmer can use it easily. DSTM2 allows researchers to plug in their STM implementations and directly compare them with others.
• The DSTM2 library assumes that multiple concurrent threads share data objects. The DSTM2 library provides a new kind of thread that can execute transactions, which access shared atomic objects. DSTM2 threads provide methods for creating new atomic classes and executing transactions.

Nonblocking Software Transactional Memory

• Nonblocking STMs are obstruction free. Nonblocking Software Transactional Memory guarantees that, if a transaction is repeatedly retried and eventually encounters no interference from other transactions, then eventually the transaction commits successfully.
• Nonblocking STM “steals” ownership of a memory location from another transaction, rather than waiting for the other transaction to explicitly release it. Accessing stolen locations is more complicated and expensive than accessing unstolen ones, but stealing is worthwhile in order to avoid waiting for another transaction that is delayed for a long time.

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Non-blocking conditions

Lock-free transactional memory

• Lock-free transactional memory: A transactional memory implementation is lock-free if all its operations are lock-free and if some thread repeatedly attempts to commit transactions, then eventually some thread performs a successful commit.
• Lock-freedom: An implementation of an operation is lock-free if after a finite number of steps of any execution of that operation, some operation execution completes (irrespective of the timing behavior of any concurrent operation executions).

Wait-free transactional memory

• Wait-free transactional memory: A transactional memory implementation is wait-free if all its operations are wait-free and any thread that repeatedly attempts to commit transactions eventually performs a successful commit.
• Wait-freedom: An implementation of an operation is wait-free if after a finite number of steps of any execution of that operation, that operation execution completes (irrespective of the timing behavior of any concurrent operation executions).

Obstruction-free transactional memory

• Obstruction-free transactional memory: A transactional memory implementation is obstruction-free if all its operations are obstruction-free and if some thread repeatedly attempts to commit transactions, and runs in isolation after some point, then it eventually performs a successful commit.
• Obstruction-freedom: An implementation of an operation is obstruction-free if every operation execution that executes in isolation after some point completes after a finite number of steps.

Hardware based Transactional memory

• HTM comprises hardware transactions implemented entirely in processor hardware. For hardware transactions, data may be stored in hardware registers and cache, such that all cache actions are done atomically in hardware and data in the HTM is only written to the main memory upon committing the transaction. The HTM holds all the speculative writes without propagating to the main system memory, such as a Random Access Memory (RAM) device, until the transaction commits. If the hardware transaction aborts, then the cache lines holding the tentative writes in the HTM are discarded. HTM hardware transactions may utilize cache coherency protocols to detect and manage conflicts between HTM hardware transactions. The cache coherency protocols keep track of accesses within a hardware transaction. If two hardware transactions are accessing a same memory location, then the HTM aborts one transaction if there is a conflict, else the transaction's changes may be committed to the system memory.
• HTM transactions usually require less overhead then STM transactions because HTM transactions occur entirely in hardware. HTM transactions may be limited to smaller transactions due to hardware limitations, whereas STM transactions can handle large and longer transactions. Source
• The multi-core processor Rock supports Hardware Transactional Memory (HTM).
• Rock’s HTM feature is an important but modest first step in integrating HTM support into a mainstream commercial multi-core processor.
• Rock supports HTM with two new instructions, chkpt and commit, and a new checkpoint status (cps) register. A transaction is started by a chkpt instruction, and is terminated by either a commit instruction or the failure of the transaction. If a transaction fails, some indication of the cause of failure is stored in the cps register, and control is transferred to the PC-relative offset (fail pc) specified by the chkpt instruction.

Adaptive Transactional Memory Test Platform

• The Adaptive Transactional Memory Test Platform (ATMTP) provides a first-order approximation of the success and failure characteristics of transactions on Rock. ATMTP will allow developers to test and tune their code for Rock.
• ATMTP correctly models Rock’s HTM-related instructions, and fairly accurately reflects most of the circumstances that cause Rock transactions to fail. ATMTP provides a good platform for experimenting with HTM-based code that will behave similarly on Rock.

Unbounded Hardware Transactional Memory (UHTM)

• UHTM is commited in-cache. When not possible, hardware “spills” transaction information into memory, allowing (essentially) unbounded transactions. UTM is more appealing for programmer, but is significantly more complicated. Unbounded means that there is no limit on the number of locations accessed by the transaction.

Best-effort Hardware Transactional Memory

• Best-effort Hardware Transactional Memory transactions are committed in-cache and aborted if they don’t fit. Best-effort Hardware Transactional Memory has simple design.Best-effort Hardware Transactional Memory violates Principle of Least Astonishment. Programmer should not have to think about cache mapping, cache size, cache organization, etc.
• Best-effort HTM does not guarantee to support transactions of any size and duration, and thus is free to simply abort transactions that exceed on-chip resources for HTM or encounter difficult events or situations.

Split Hardware Transaction (SpHT)

• The Split Hardware Transaction (SpHT)uses minimal software support to combine multiple segments of an atomic block, each executed using a separate hardware transaction, into one atomic operation. The idea of segmenting transactions can be used for many purposes, including nesting, local retry, or Else, and user-level thread scheduling. SpHT overcomes the limited expressive power of best-effort HTM while imposing overheads dramatically lower than STM and preserving useful guarantees such as strong atomicity provided by the underlying HTM.

Virtualized Transactional Memory (VTM)

• Virtualized TM (VTM) maintains atomicity and isolation even if a transaction is interrupted by a cache overflow or a system event. VTM maps the key bookkeeping data structures for transactional execution (read set, write set, write buffer or undo-log) to virtual memory, which is effectively unbounded and is unaffected by system interruptions. The hardware caches hold the working set of these data structures. VTM also suggested the use of hardware signatures to avoid redundant searches through structures in virtual memory.

Conflict detection

• HTM systems rely on a computer’s cache hierarchy and the cache coherence protocol to implement conflict detection. Caches observe all reads and writes issued by a processor, can buffer a significant amount of data, and can be searched efficiently because of their associative organization. All HTMs modify the first-level caches, but the approach extends to higher-level caches, both private and shared.
• Conflict detection occurs as other processors receive the coherence messages from the committing transaction. Hardware looks up the received block address in the local caches. If the block is in a cache and has its R or W bit set, there is a read-write or a write-write conflict between the committing and the local transaction. The hardware signals a software handler, which aborts the local transaction and potentially retries it after a backoff period.
• Direct memory updates: For direct updates, the hardware transparently logs the original value in a memory block before its first modification by a transaction. If the transaction aborts, the log is used to undo any memory updates.
• Early conflict detection : For early conflict detection, the hardware acquires exclusive access to the cache block on the first write and maintains it until the transaction commits.

Hybrid Transactional memory (HyTM)

• The HyTM approach is to provide an STM implementation that does not depend on hardware support beyond what is widely available today, and also to provide the ability to execute transactions using whatever HTM support is available in such a way that the two types of transactions can coexist correctly.
• The key idea to achieving correct interaction between software transactions and hardware transactions is to augment hardware transactions with additional code that ensures that the transaction does not commit if it conflicts with an ongoing software transaction.

Phased Transactional Memory (PhTM)

• Phased Transactional Memory (PhTM)supports switching between different “phases”, each implemented by a different form of transactional memory support. PhTM allows to adapt between a variety of different transactional memory implementations.

Nonblocking Zero-Indirection Transactional Memory (NZTM)

• Nonblocking Zero-Indirection Transactional Memory (NZTM) is a nonblocking, zero-indirection object-based hybrid transactional memory system. NZTM can execute transactions using best-effort hardware transactional memory or by using compatible software transactional memory system.

Hardware-Accelerated STM (HASTM)

• Hardware-Accelerated STM (HASTM) system proposes hardware support to reduce the overhead of STM instrumentation. The supplementary hardware allows software to build fast filters that could accelerate the common case of read set maintenance.
• HASTM provides the STM with two capabilities through per-thread mark bits at the granularity of cache blocks.
• Conflict detection: Software can check if a mark bit was previously set for a given block of memory and that no other thread wrote to the block since it was marked.
• Validation: Software can query if potentially there were writes by other threads to any of the memory blocks that the thread marked.

Signature-Accelerated STM (SigTM)

• Signature-Accelerated STM (SigTM)uses hardware signatures to encode the read set and write set for software transactions. A hardware Bloom filter outside of the caches computes the signatures.b Software instrumentation provides the filters with the addresses of the objects read or written within a transaction. To detect conflicts, hardware in the computer monitors coherence traffic for requests for exclusive accesses to a cache block, which indicates a memory update.
• The hardware tests if the address in a request is potentially in a transaction’s read or write set by examining the transaction’s signatures. If so, the memory reference is a potential conflict and the STM can either abort a transaction or turn to software validation.

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Search strategy

English Search concepts

S. No.	Transactional memory	Atomic memory transactions	Concurrency control	Shared memory access
1	Transactional memory	Atomic memory transactions	Concurrency control	Shared memory synchronization
2	Transactional execution AND memory	Atomically memory accesses	Concurrent computing	Shared memory access
3	Hybrid transactional memory
4	Software transactional memory
5	Hardware transactional memory

French Search concepts

S. No.	Transactional memory	Atomic memory transactions	Concurrency control	Shared memory access
1	mémoire transactionnelle	opérations de mémoire atomique	contrôle de concurrence	La synchronisation de mémoire partagée
2	l'exécution des transactions AND mémoire	accès à la mémoire atomique	programmation concurrente	Accès à la mémoire partagée
3	hybride mémoire transactionnelle
4	mémoire logiciel transactionnel
5	mémoire matérielle transactionnel

German Search concepts

S. No.	Transactional memory	Atomic memory transactions	Concurrency control	Shared memory access
1	transaktionalen Speicher	Atom-Speicher-Transaktionen	Concurrency Kontrolle	Shared-Memory-Synchronisation
2	transaktionale Ausführung AND Speicher	atomar Speicherzugriffe	Concurrent Computing	Shared-Memory-Zugriff
3	Hybrid transaktionalen Speicher
4	Software transaktionalen Speicher
5	Hardware transaktionalen Speicher

Search strings

Concepts	Scope	Search string	No of hits
Transactional memory	Search scope: US Granted US Applications EP-A EP-B WO JP DE-C,B DE-A DE-T DE-U GB-A FR-A; Claims, Title or Abstract Years: 1836-2008	(transactional ADJ memory) OR ((transactional ADJ execution) SAME memory)	167
Other Keywords		(atomic*4 NEAR2 memory NEAR2 (transaction*1 OR access*2)) OR (((concurrency ADJ control) OR (concurrent ADJ computing)) WITH ((shared ADJ memory) AND (synchronization OR access*2)))	24
Final		1 OR 2	82 unique (189 patents including families)

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IP Trend

• 75 patents published in the last 10 years.
• Patent filing is more in the last 4 years(75 %)

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Key companies

• Intel(26 patents) and Sun Microsystems (19 patents) are major players.
• Microsoft(11 patents) and IBM(7 patents) are next to them.

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Top IPC and US Classes

• Top IPC class: G06F

• Top US class: 711, 707, 712, 717, 718

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Sample analysis

S.No.	Patent/Publication No.	Title	Transactional memory	Summary
1	US20040015642A1	Software transactional memory for dynamically sizable shared data structures	Dynamic STM (DSTM)	A software transactional memory that allows concurrent non-blocking access to a dynamically sizable data structure defined in shared storage managed by the software transactional memory is described. The implementation is called dynamic software transactional memory (DSTM). DSTM techniques allow transactions and transactional objects to be created dynamically. The non-blocking property considered here is obstruction-freedom.
2	US20060085591A1	Hybrid hardware and software implementation of transactional memory access	Phased Transactional Memory (PhTM)	The invention relates to a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
3	US20070028056A1	Direct-update software transactional memory	Dynamic STM (DSTM)	A transactional memory programming interface allows a thread to directly and safely access one or more shared memory locations within a transaction while maintaining control structures to manage memory accesses to those same locations by one or more other concurrent threads. Each memory location accessed by the thread is associated with an enlistment record, and each thread maintains a transaction log of its memory accesses.
4	US20070156780A1	Protecting shared variables in a software transactional memory system	Dynamic STM (DSTM)	For a variable accessed at least once in a software-based transactional memory system (STM) defined (STM-defined) critical region of a program, modifying an access to the variable that occurs outside any STM-defined critical region system by starting a hardware based transactional memory based transaction, within the hardware based transactional memory based transaction, checking if the variable is currently owned by a STM transaction, If the variable is not currently owned by a STM transaction, performing the access and then committing the hardware based transactional memory transaction and if the variable is currently owned by a STM transaction, performing a responsive action.
5	US20070156994A1	Unbounded transactional memory systems	Unbounded Hardware Transactional Memory (UHTM)	Methods and apparatus to provide unbounded transactional memory systems are described. Transactional memory is implemented through a table lookup mechanism. To access a shared resource, a thread may first check a table stored in memory to determine whether another thread is accessing the same portion of the shared resource. Accessing a table that is stored in memory may generate overhead that decreases performance.
6	US20070239942A1	Transactional memory virtualization	Virtualized Transactional Memory (VTM)	Methods and apparatus to provide transactional memory execution in a virtualized mode are described. Data corresponding to a transactional memory access request is stored in a portion of a memory after an operation corresponding to the transactional memory access request causes an overflow and a stored value may be updated for an occurrence of the overflow.
7	US20070300238A1	Adapting software programs to operate in software transactional memory environments	Dynamic Software Transactional Memory 2.0 (DSTM2)	Software transactional memory is used in non-managed language environments and with legacy codes without requiring a software programmer to change the programming paradigm they are currently used to. STM adapter system automatically transforms all the binary code executed within that block to execute atomically. STM adapter system automatically transforms lock-based critical sections in existing binary code to atomic blocks,
8	US20080005504A1	Global overflow method for virtualized transactional memory	Virtualized Transactional Memory (VTM)	A method and apparatus for virtualizing and/or extending transactional memory is described. Transactions are executed using local shared transactional memory, such as a cache memory. Upon overflowing the shared transactional memory, the transactional memory is virtualized and/or extended into a higher-level memory, such as a system memory.
9	US20080098374A1	Method and apparatus for performing dynamic optimization for software transactional memory	Dynamic STM (DSTM)	The present invention relates to a method and apparatus for performing dynamic optimization for STM. An optimistically immutable field is determined in the transaction to write. The transaction optimization unit keeps track of the status of object and class fields in a transaction. The transaction optimization unit invalidates methods corresponding to an optimistically immutable field in response to determining that the field has been written to and is therefore not immutable.
10	WO2008088931A2	FACILITATING EFFICIENT TRANSACTIONAL MEMORY AND ATOMIC OPERATIONS VIA CACHE LINE MARKING	Hardware-Accelerated STM (HASTM)-Conflict detection	The system starts by executing a transaction for a thread, wherein executing the transaction involves placing load-marks on cache lines which are loaded during the transaction and placing store-marks on cache lines which are stored to during the transaction. Upon completing the transaction, the system releases the load-marks and the store-marks from the cache lines which were load-marked and store-marked during the transaction. Note that during the transaction, the load-marks and store-marks prevent interfering accesses from other threads to the cache lines.

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